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one technology way, p.o. box 9106, norwood. ma 02062-9106, u.s.a. tel: 617/329-4700 fax: 617/326-8703 rev. 0 information furnished by analog devices is believed to be accurate and reliable. however, no responsibility is assumed by analog devices for its use, nor for any infringements of patents or other rights of third parties which may result from its use. no license is granted by implication or otherwise under any patent or patent rights of analog devices. a low cost quad voltage controlled amplifier ssm2164 general description the ssm2164 contains four independent voltage controlled amplifiers (vcas) in a single package. high performance (100 db dynamic range, 0.02% thd) is provided at a very low cost-per-vca, resulting in excellent value for cost sensitive gain control applications. each vca offers current input and output for maximum design flexibility, and a ground referenced C33 mv/db control port. all channels are closely matched to within 0.07 db at unity gain, and 0.24 db at 40 db of attenuation. a 120 db gain range is possible. a single resistor tailors operation between full class a and ab modes. the pinout allows upgrading of ssm2024 designs with minimal additional circuitry. the ssm2164 will operate over a wide supply voltage range of 4 v to 18 v. available in 16-pin p-dip and soic packages, the device is guaranteed for operation over the extended industrial temperature range of C40 c to +85 c. features four high performance vcas in a single package 0.02% thd no external trimming 120 db gain range 0.07 db gain matching (unity gain) class a or ab operation applications remote, automatic, or computer volume controls automotive volume/balance/faders audio mixers compressor/limiters/compandors noise reduction systems automatic gain controls voltage controlled filters spatial sound processors effects processors functional block diagram power supply and biasing circuitry vca4 vca3 vca2 vca1 v+ gnd v mode i iout i iout i iout i iout v c v c v c v c i in i in i in i in
ssm2164Cspecifications electrical specifications ssm2164 parameter conditions min typ max units audio signal path noise v in = gnd, 20 khz bandwidth C94 dbu headroom clip point = 1% thd+n 22 dbu total harmonic distortion 2nd and 3rd harmonics only a v = 0 db, class a 0.02 .1 % a v = 20 db, class a 1 0.15 % a v = 0 db, class ab 0.16 % a v = 20 db, class ab 1 0.3 % channel separation C110 db unity gain bandwidth c f = 10 pf 500 khz slew rate c f = 10 pf 0.7 ma/ m s input bias current 10 na output offset current v in = 0 50 na output compliance 0.1 v control port input impedance 5k w gain constant (note 2) C33 mv/db gain constant temperature coefficient C3300 ppm/ c control feedthrough 0 db to C40 db gain range 3 1.5 8.5 mv gain matching, channel-to-channel a v = 0 db 0.07 db a v = C40 db 0.24 db maximum attenuation C100 db maximum gain +20 db power supplies supply voltage range 4 18 v supply current class ab 6 8 ma power supply rejection ratio 60 hz 90 db notes 1 C10 dbu input @ 20 db gain; +10 dbu input @ C20 db gain. 2 after 60 seconds operation. 3 +25 c to +85 c. specifications subject to change without notice. rev. 0 C2C typical application and test circuit (v s = 15 v, a v = 0 db, 0 dbu = 0.775 v rms, v in = 0 dbu, r in = r out = 30 k w , f = 1 khz, C40 c < t a < +85 c using typical application circuit (class ab), unless otherwise noted. typical specifications apply at t a = +25 c.) 30k w v in4 500 w 560pf power supply and biasing circuitry vca4 98 16 1 v gnd v+ mode 0.1? 0.1? r b (7.5k w class a) (open class ab) +15v ?5v 1/2 op275 30k w 100pf v out4 i iout 13 14 15 v c4 i in v c figure 1. r in = r out = 30 k w , c f = 100 pf. optional r b = 7.5 k w , biases gain core to class a opera- tion. for class ab, omit r b .
ssm2164 rev. 0 C3C ordering guide temperature package package model range description options ssm2164p C40 c to +85 c plastic dip n-16 ssm2164s C40 c to +85 c narrow soic r-16a absolute maximum ratings supply voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 v input, output, control voltages . . . . . . . . . . . . . . . . vC to v+ output short circuit duration to gnd . . . . . . . . . indefinite storage temperature range . . . . . . . . . . . . C65 c to +150 c operating temperature range . . . . . . . . . . . . . C40 c to +85 c junction temperature range . . . . . . . . . . . . C65 c to +150 c lead temperature range (soldering 60 sec) . . . . . . . . +300 c package type q ja * q jc units 16-pin plastic dip (p suffix) 76 33 c/w 16-pin soic (s suffix) 92 27 c/w * q ja is specified for the worst case conditions; i.e., q ja is specified for device in socket for p-dip packages, q ja is specified for device soldered in circuit board for soic package. pin configuration 16-lead epoxy dip and soic mode i in1 v+ i in4 i out2 v c2 i in2 i out3 v c3 i in3 v c1 i out1 v c4 i out4 gnd v 1 2 16 15 5 6 7 12 11 10 3 4 14 13 89 top view (not to scale) ssm2164 warning! esd sensitive device caution esd (electrostatic discharge) sensitive device. electrostatic charges as high as 4000 v readily accumulate on the human body and test equipment and can discharge without detection. although the ssm2164 features proprietary esd protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. therefore, proper esd precautions are recommended to avoid performance degradation or loss of functionality.
ssm2164 rev. 0 C4C typical performance characteristics figure 2. thd+n vs. frequency, class a figure 3. thd+n vs. frequency class, ab figure 4. thd distribution, class a 300 280 260 240 200 180 160 140 120 100 60 40 20 0 80 220 0.005 0.010 0.015 0.020 0.025 0.030 0.035 0.040 0.045 0.050 thd ?% units v s = 15v t a = +25 c 1200 channels figure 5. thd distribution, class ab 210 200 190 180 170 160 150 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 units 0.00 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 thd ?% v s = 15v t a = +25 c 1200 channels figure 6. thd+n vs. amplitude figure 7. thd+n vs. supply voltage, class a 0.10 0 20 0.06 0.02 4 0.04 0 0.08 16 12 8 thd + n ?% supply ?volts lpf = 80khz 1.0 0.1 0.01 thd + n ?% 20 100 1k 10k 20k frequency ?hz class a v s = 15v lpf = 80khz a v = + 20db a v = ?20db a v = 0db 1.0 0.1 0.01 thd + n ?% 20 100 1k 10k 20k frequency ?hz a v = ?0db a v = +20db a v = 0db class ab v s = 15v lpf = 80khz amplitude ?v rms 1.0 0.1 0.01 thd + n ?% 20 100 1k 10k 20k v s 15v a v = 0db lpf = 22khz class a class ab
ssm2164 rev. 0 C5C figure 11. voltage noise density vs. r bias figure 8. thd vs. temperature, class a figure 9. thd vs. temperature, class ab figure 12. thd vs. r bias figure 13. control feedthrough vs. r bias figure 10. voltage noise density vs. frequency, class ab 1000 100 10 1k 10k 1m 100k r bias ? w voltage noise density ?nv/ hz v s = 15v t a = +25 c 1.0 0.1 0.01 1k 10k 1m 100k r bias ? w v s = 15v t a = +25 c thd ?% 0.030 0.025 0.020 0.015 0.010 ?0 ?0 0 20 40 60 80 temperature ? c % thd v s = 15v v in = 0dbu a v = 0db 500 400 0 1 10 100k 10k 1k 100 300 200 100 frequency ?hz v s = 15v r in = r f = 30k w t a = +25 c noise ?nv/ hz 0.30 0.25 0.20 0.15 0.10 ?0 ?0 0 20 40 60 80 temperature ? c % thd v s = 15v v in = 0dbu a v = 0db 1k 10k 1m 100k r bias ? w 10 ? ?0 ?0 ?5 0 5 control feedthrough ?mv v s = 15v t a = +25 c
ssm2164 rev. 0 C6C typical performance characteristics 15 0 ?5 10k 10m 1m 100k 1k v s = 15v t a = +25 c a v = 0db c f = 10pf phase gain ? ?0 5 10 0 ?0 ?80 90 180 gain ?db frequency ?hz phase ?degrees figure 14. gain/phase vs. frequency 0.1 ?.1 ?.4 100 100k 10k 1k 10 ?.2 ?.3 0 gain ?db frequency ?hz c f = 100pf c f = 10pf v s = 15v t a = +25 c a v = 0db figure 15. gain flatness vs. frequency 40 20 ?0 100 1k 10m 1m 100k 10k 0 ?0 ?0 frequency ?hz gain ?db a v = +20db a v = 0db a v = ?0db v s = 15v t a = +25 c c f = 10pf figure 16. bandwidth vs. gain figure 17. C3 db bandwidth vs. i-to-v feedback capacitor 30 15 0 110 100 5 10 20 25 slew rate ?v/ m s i to v feedback capacitor ?pf slew rate v s = 15v t a = +25 c op275 output amplifier figure 18. slew rate vs. i-to-v feedback capacitor 20 ?0 ?0 1k 1m 100k 10k 100 ?0 ?0 0 frequency ?hz v s = 15v t a = +25 c v in = 0v r f = r in = 30k w control feedthrough ?db figure 19. control feedthrough vs. frequency 10m 1m 10k 1 10 1000 100 100k ?db bandwidth ?hz i to v feedback capacitor ?pf v s = 15v t a = +25 c
ssm2164 rev. 0 C7C 0 ?0 ?00 10 100 1m 100k 10k 1k ?0 ?0 ?0 frequency ?hz psrr ?db v s = 15v t a = +25 c +psrr ?srr figure 20. psrr vs. frequency 25 20 0 1k 10k 1m 100k 15 10 5 supply current ?ma r bias ? w +isy ?sy v s = 15v t a = +25 c figure 21. supply current vs. r bias ?5 ?0 100 ?5 ?5 ?5 ?0 ?0 ?0 75 50 25 0 gain constant ?mv/db temperature ? c class a and class ab v s = 15v figure 22. gain constant vs. temperature applications information circuit description the ssm2164 is a quad voltage controlled amplifier (vca) with 120 db of gain control range. each vca is a current-in, current-out device with a separate C33 mv/db voltage input control port. the class of operation (either class a or class ab) is set by a single external resistor allowing optimization of the distortion versus noise tradeoff for a particular application. the four independent vcas in a single 16-pin package make the ssm2164 ideal for applications where multiple volume control elements are needed. figure 23. simplified schematic (one channel) the simplified schematic in figure 23 shows the basic structure of one of the four vcas in the device. the gain core is com- prised of the matched differential pairs q1-q4 and the current mirrors of q5, q6 and q7, q8. the current input pin, i in , is connected to the collectors of q1 and q7, and the difference in current between these two transistors is equivalent to i in . for example, if 100 m a is flowing into the input, q1s collector current will be 100 m a higher than q7s collector current. varying the control voltage v c , steers the signal current from one side of each differential pair to the other, resulting in either gain or attenuation. for example, a positive voltage on v c steers more current through q1 and q4 and decreases the current in q2 and q3. the current output pin, i out , is con- nected to the collector of q3 and the current mirror (q6) from q2. with less current flowing through these two transistors, less current is available at the output. thus, a positive v c attenuates the input and a negative v c amplifies the input. the vca has unity gain for a control voltage of 0.0 v where the signal current is divided equally between the gain core differential pairs. the mode pin allows the setting of the quiescent current in the gain core of the vca to trade off the ssm2164s thd and noise performance to an optimal level for a particular applica- tion. higher current through the core results in lower distortion q6 q5 q8 q7 q2 q1 q4 q3 i in i out v c 4.5k w 500 w 450 w mode v v+
ssm2164 rev. 0 C8C but higher noise, and the opposite is true for less current. the increased noise is due to higher current noise in the gain core transistors as their operating current is increased. thd has the opposite relationship to collector current. the lower distortion is due to the decrease in the gain core transistors emitter impedance as their operating current increases. this classical tradeoff between thd and noise in vcas is usually expressed as the choice of using a vca in either class a or class ab mode. class ab operation refers to running a vca with less current in the gain core, resulting in lower noise but higher distortion. more current in the core corresponds to class a performance with its lower thd but higher noise. figures 11 and 12 show the thd and noise performance of the ssm2164 as the bias current is adjusted. notice the two characteristics have an inverse characteristic. the quiescent current in the core is set by adding a single resistor from the positive supply to the mode pin. as the simplified schematic shows, the potential at the mode pin is one diode drop above the ground pin. thus, the formula for the mode current is: i mode = ( v + ) - 0. 6 v r b with 15 v supplies, an r b of 7.5k gives class a biasing with a current of 1.9 ma. leaving the mode pin open sets the ssm2164 in class ab with 30 m a of current in the gain core. basic vca configuration figure 24 shows the basic application circuit for the ssm2164. each of the four channels is configured identically. a 30 k w resistor converts the input voltage to an input current for the vca. additionally, a 500 w resistor in series with a 560 pf capacitor must be added from each input to ground to ensure stable operation. the output current pin should be maintained at a virtual ground using an external amplifier. in this case the op482 quad jfet input amplifier is used. its high slew rate, wide bandwidth, and low power make it an excellent choice for the current-to-voltage converter stage. a 30 k w feedback resistor is chosen to match the input resistor, giving unity gain for a 0.0 v control voltage. the 100 pf capacitors ensure stability and reduce high frequency noise. they can be increased to reduce the low pass cutoff frequency for further noise reduction. for this example, the control voltage is developed using a 100 k w potentiometer connected between +5 v and ground. this configuration results in attenuation only. to produce both gain and attenuation, the potentiometer should be connected between a positive and negative voltage. the control input has an impedance of 5 k w . because of this, any resistance in series with v c will attenuate the control signal. if precise control of the gain and attenuation is required, a buffered control voltage should be used. notice that a capacitor is connected from the control input to ground. because the control port is connected directly to the gain core transistors, any noise on the v c pin will increase the output noise of the vca. filtering the control voltage ensures that a minimal amount of noise is introduced into the vca, allowing its full performance to be realized. in general, the largest possible capacitor value should be used to set the filter at a low cutoff frequency. the main exception to this is in dynamic processing applications, where faster attack or decay times may be needed. figure 24. basic quad vca configuration low cost, four-channel mixer the four vcas in a single package can be configured to create a simple four-channel mixer as shown in figure 25. the inputs and control ports are configured the same as for the basic vca, but the outputs are summed into a single output amplifier. the op176 is an excellent amplifier for audio applications because of its low noise and distortion and high output current drive. the amount of signal from each input to the common output can be independently controlled using up to 20 db of gain or as much as 100 db of attenuation. additional ssm2164s could be added to increase the number of mixer channels by simply summing their outputs into the same output amplifier. another possible configuration is to use a dual amplifier such as the op275 to create a stereo, two channel mixer with a single ssm2164. 1? 1? 1? 1? +5v 100k 30k v in4 500 560pf power supply and biasing circuitry vca4 +5v 100k 30k v in3 500 560pf vca3 +5v 100k 30k v in2 500 560pf vca2 +5v 100k 30k v in1 500 560pf vca1 98 16 1 v gnd v+ mode 0.1? 0.1? r b (7.5k w class a) (open classab) +15v ?5v 1/4 op482 1/4 op482 1/4 op482 1/4 op482 30k 30k 30k 30k 100pf 100pf 100pf 100pf v out1 v out2 v out3 v out4 i iout i iout i iout i iout 3 2 6 7 4 5 13 12 11 10 14 15 v c i in i in v c i in v c i in v c
ssm2164 rev. 0 C9C 30k 500 560pf power supply and biasing circuitry vca4 30k 500 560pf vca3 30k 500 560pf vca2 30k 500 560pf vca1 v+ gnd v mode 30k w 100pf v out i iout i iout i iout i iout op176 from additional ssm2164s for > 4 channels v c v c v c v c i in i in i in i in if additional ssm2164s are added, the 100 pf capacitor may need to be increased to ensure stability of the output amplifier. most op amps are sensitive to capacitance on their inverting inputs. the capacitance forms a pole with the feedback resistor, which reduces the high frequency phase margin. as more ssm2164s are added to the mixer circuit, their output capaci- tance and the parasitic trace capacitance add, increasing the overall input capacitance. increasing the feedback capacitor will maintain the stability of the output amplifier. digital control of the ssm2164 one option for controlling the gain and attenuation of the ssm2164 is to use a voltage output digital-to-analog converter such as the dac8426 (figure 26), whose 0 v to +10 v output controls the ssm2164s attenuation from 0 db to C100 db. its simple 8-bit parallel interface can easily be connected to a microcontroller or microprocessor in any digitally controlled system. the voltage output configuration of the dac8426 provides a low impedance drive to the ssm2164 so the attenua- tion can be controlled accurately. the 8-bit resolution of the dac and its full-scale voltage of +10 v gives an output of 3.9 mv/bit. since the ssm2164 has a C33 mv/db gain con- stant, the overall control law is 0.12 db/bit or approximately 8 bits/db. the input and output configuration for the ssm2164 is the same as for the basic vca circuit shown earlier. the 4-to-1 mixer configuration could also be used. latch a latch b latch c latch d dac a dac b dac c dac d logic control 10v reference data bus 3 5 6 v ss agnd dgnd 15 16 17 wr a1 a0 14 7 lsb msb 4 v ref out +10v 18 v dd +15v 2 1 20 19 v outa v outb v outc v outd dac8426 power supply and biasing circuitry vca4 vca3 vca2 vca1 v+ gnd v mode i iout i iout i iout i iout v c v c v c v c i in i in i in i in +15v ?5v figure 26. digital control of vca gain figure 25. four-channel mixer (4 to 1)
ssm2164 rev. 0 C10C single supply operation the ssm2164 can easily be operated from a single power supply as low as +8 v or as high as +36 v. the key to using a single supply is to reference all ground connections to a voltage midway between the supply and ground as shown in figure 27. the op176 is used to create a pseudo-ground reference for the ssm2164. both the op482 and op176 are single supply amplifiers and can easily operate over the same voltage range as the ssm2164 with little or no change in performance. gnd mode v+ v 16 1 9 8 v+ = +8v r b v c (0db gain at v c = ) v+ 2 500 w 560pf 30k w 10? v in v+ 1/4 op482 op176 v+ 30k w v out 10k w 10k w v+ 10? v+/2 to additional op482 amplifiers (1.8k w for class a) (open for class b) 100pf figure 27. single supply operation of the ssm2164 (one channel shown) the reference voltage is set by the resistor divider from the positive supply. two 10 k w resistors create a voltage equal to the positive supply divided by 2. the 10 m f capacitor filters the supply voltage, providing a low noise reference to the circuit. this reference voltage is then connected to the gnd pin of the ssm2164 and the noninverting inputs of all the output amplifi- ers. it is important to buffer the resistor divider with the op176 to ensure a low impedance pseudo-ground connection for the ssm2164. the input can either be referenced to this same mid-supply voltage or ac coupled as is done in this case. if the entire system is single supply, then the input voltage will most likely already be referenced to the midpoint; if this is the case, the 10 m f input capacitor can be eliminated. unity gain is set when v c equals the voltage on the gnd pin. thus, the control voltage should also be referenced to the same midsupply voltage. the value of the mode setting resistor may also change depending on the total supply voltage. because the gnd pin is at a pseudo-ground potential, the equation to set the mode current now becomes: i mode = ( v + ) - v gnd - 0. 6 v r b the value of 1.8 k w results in class a biasing for the case of using a +8 v supply. upgrading ssm2024 sockets the ssm2164 is intended to replace the ssm2024, an earlier generation quad vca. the improvements in the ssm2164 have resulted in a part that is not a drop-in replacement to the ssm2024, but upgrading applications with the ssm2024 is a simple task. the changes are shown in figure 28. both parts have identical pinouts with one small exception. the mode input (pin 1) does not exist on the ssm2024. it has fixed internal biasing, whereas flexibility was designed into the ssm2164. a mode set resistor should be added for class a operation, but if the ssm2164 is going to be operated in class ab, no external resistor is needed. v+ 16 1 9 8 200 w 10k w v in1 nc ssm2024 v 10k w v out1 4 v c1 10k w 3 2 v+ 16 1 9 8 500 w 30k w v in1 ssm2164 v 30k w v out1 4 v c1 3 2 560pf r b figure 28. upgrading ssm2024 sockets with ssm2164 since both parts are current output devices, the output configu- ration is nearly identical, except that the 10 k w resistors should be increased to 30 k w to operate the ssm2164 in its optimum range. the 10 k w input resistor for the ssm2024 should also be increased to 30 k w to match the output resistor. addition- ally, the 200 w resistor should be replaced by a 500 w resistor in series with 560 pf for the ssm2164 circuit. one last change is the control port configuration. the ssm2024s control input is actually a current input. thus, a resistor was needed to change the control voltage to a current. this resistor should be removed for the ssm2164 to provide a direct voltage input. in addition, the ssm2024 has a log/log control relationship in contrast to the ssm2164s linear/log gain constant. the linear input is actually much easier to control, but the difference may necessitate adjusting a ssm2024 based circuits control voltage gain curve. by making these relatively simple changes, the superior performance of the ssm2164 can easily be realized.
ssm2164 rev. 0 C11C outline dimensions dimensions shown in inches and (mm). 16-pin plastic dip (n-16) 16-pin narrow soic (r-16a) 0.210 (5.33) max 0.160 (4.06) 0.115 (2.93) 0.022 (0.558) 0.014 (0.356) 0.100 (2.54) bsc pin 1 0.280 (7.11) 0.240 (6.10) 0.325 (8.25) 0.300 (7.62) 0.015 (0.381) 0.008 (0.204) 0.195 (4.95) 0.115 (2.93) seating plane 0.060 (1.52) 0.015 (0.38) 0.130 (3.30) min 0.070 (1.77) 0.045 (1.15) 0.840 (21.33) 0.745 (18.93) 9 16 18 pin 1 0.1574 (4.00) 0.1497 (3.80) 0.2440 (6.20) 0.2284 (5.80) 1 16 9 8 0.0500 (1.27) 0.0160 (0.41) 8 0 0.0196 (0.50) 0.0099 (0.25) x 45 0.0099 (0.25) 0.0075 (0.19) 0.0192 (0.49) 0.0138 (0.35) 0.0500 (1.27) bsc 0.0688 (1.75) 0.0532 (1.35) 0.0098 (0.25) 0.0040 (0.10) 0.3937 (10.00) 0.3859 (9.80)
printed in u.s.a. c1969C10C10/94 C12C

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